Is it possible to allow multiple drivers on a wire?

Question

I am trying to create a CPU on an FPGA, but I don't know how to create the main data bus. Ideally, I would have a wire array that has multiple inputs and outputs which get enabled at different times, but if I do that I get a "Multiple Driver Nets" error.

I have tried using wires, registers, and different assignment methods to achieve this result, but I can't get it to work, because it will always inherently have multiple input connections.


module Top(
    input [7:0] sw,
    output [7:0] led,
    input we,
    input oe,
    input clk
    );

    wire [7:0] regData;
    Register register (regData, we, oe, clk);

    assign led = regData;
    assign regData = sw;

endmodule

The exact error message is "[DRC MDRV-1] Multiple Driver Nets: Net led_OBUF[0] has multiple drivers: register/led_OBUF[0]_inst_i_1/O, and sw_IBUF[0]_inst/O. " one of those for each bit in the register (8 bits)

Matthew Taylor Matthew Taylor · Accepted Answer · 2019-07-10T15:16:09

Presumably, this is an error from your synthesiser, not your simulator. You haven't given enough code - an MCVE - to show whether you are using tri-state logic or not, but whether you are or not, you are taking the wrong approach.

Back in the day, people used tri-state logic to implement buses, because routing resource was scarce. Routing resource could be saved by driving a net from multiple places (eg each slave might have driven a common data bus). Tri-state logic, however, is nasty. (There are problems caused by contention and problems if nothing drives the bus.) You don't want to use it, unless you need to. And you don't need to, because in modern chips, routing resource is plentiful. So, don't use tri-state logic inside your design; don't use multiply-driven nets inside your design.

Instead use conventional (singly-driven) logic structures. For example, to implement a data bus, have separate write-data buses (which will have one driver - the bus master) and many read-data buses (each of which will have one driver - each slave). Then use a conventional multiplexer to multiplex the read data buses.

Is it possible to allow multiple drivers on a wire?

2 Answers