Taking baby steps with Verilog and Xilinx ISE Webpack, flashing this to a Mimas V2 Spartan 6 gives no output when any switches are pressed, can anyone see what I'm missing?
module OneBitFullAdder(
input wire ci,
input wire a,
input wire b,
output wire sum,
output wire co
);
assign co = (a&b)|(ci&(a^b));
assign sum = (a^b^ci);
endmodule
Here are my constraints:
NET "b" PULLDOWN;
NET "a" PULLDOWN;
NET "ci" PULLDOWN;
NET "sum" LOC = T18;
NET "b" LOC = L18;
NET "a" LOC = M18;
NET "ci" LOC = M16;
NET "co" LOC = T17;
And here's the board schematic for port allocation:
https://docs.numato.com/wp-content/uploads/2016/03/mimasv2-dipswitch.png
It works in simulation, and in practise I found the LEDs output the correct logic if I set any combination of inputs to pull-up, but pressing switches has no effect. I've tried allocating different switches.
If I've missed out some information that will help, let me know, serious beginner here (in both Verilog and FPGA).