0
votes

I have an system verilog interface

interface XZY(input clk, input reset, input a, output b);
    clocking cb @(posedge clk);
        input a;
        output b;
    endclocking: cb

   modport master(clocking cb, input reset);


endinterface: XYZ

I am passing the interface as virtual interface to my driver.

The driver is using the moport(master).

Now I need to access both the posedge and the negedge of the clock in my driver.

I can easily access the posedge by @cb.

How do I access the negedge?

Do i need to create another modport/clocking block for the negedge and pass it separately to the driver?

2
You can just pass 'clk' through modport in this case and use its edges. - Serge

2 Answers

1
votes

I would recommend a clocking block for both positive and negative edge clocks. You can have both clocking blocks listed in your modport. You don't need a modport when in your driver/monitor.

If you want to dynamically choose the polarity with the same clocking block then see my answer here: Changing clocking block clock polarity on the fly. This works for a polarity mode switch; I would not recommend it if both edges are needed in the same transaction.

1
votes

If you choose to use a clocking block as the only mechanism for accessing signals in your interface, then you'll have to create another clocking block. I normally don't use modports in verification interfaces, but you would have to add the clocking bock to your existing modport or add another one.