Quartus Prime compilation ROM

Question

Hi I am designing a ISA RISCV 32 bits microcontroller and I have organized the ROM in arrays of 8 bits (1 byte), then the out is 32 bit width. Because I need it.

rom.txt: (each line is a instruction)

00000011 00100000 00000111 10010011                 
00000001 01000000 00001000 00010011 
00000001 00000111 10001000 10110011                 
00000001 00010001 00100000 00100011     
00000000 00000001 00101001 00000011
00000001 00100001 00100100 00100011
00000000 10000001 00101001 10000011
01000001 00000111 10001010 00110011
11111100 11101000 00001010 10010011     
11111101 01100000 00001110 11100011

ROM RTL:

module ROM(RADDRESS, DATA_OUT);

    parameter WIDTH = 32;    // out width
    parameter SIZE = 128;    // Total elements of 8 bytes

    input   [WIDTH-1:0]     RADDRESS ;
    output  [WIDTH-1:0]     DATA_OUT;
    reg     [7:0]           MEMORY [SIZE-1:0]; 

    initial // Read instructions 
    begin
        $readmemb("rom.txt", MEMORY); 
    end

    assign DATA_OUT = {MEMORY[RADDRESS], MEMORY[RADDRESS+1], MEMORY[RADDRESS+2], MEMORY[RADDRESS+3]}; // Big endian

endmodule

When I simulate with a testbench in Questasim/Modelsim the microcontroller works fine and the instructions are executing properly.

But in Quartus Prime when I compile it just compiles fine but in Compilation Report I get a total of 0 logic elements and 0 registers.

Of course I have a RAM and another components inside microcontroller than are also using registers and logic cells.

Also I have input and output pins for/from microcontroller. The top hierarchy level module has output and input.

It's like Quartus syntethizer is just not detecting my RTL because my ROM.

there should be more messages in your reports which would explain the situation. — Serge
- Warning (10850): Verilog HDL warning at ROM.sv(13): number of words (40) in memory file does not match the number of elements in the address range [0:255]. - Warning (10855): Verilog HDL warning at ROM.sv(12): initial value for variable MEMORY should be constant. - Warning (10030): Net "MEMORY" at ROM.sv(9) has no driver or initial value, using a default initial value '0'. — user8554358
It looks like your rom.txt file does not have enough data to initialize all the memory. Sorry, do not know much about Quartus so say if this could be the reason for your problem or not. — Serge
Are there no other warning or errors besides those for your ROM? — Unn

pc3e pc3e · Accepted Answer · 2019-01-02T22:59:53

I would try the following:

Use the ROM template in Quartus (open your design file, then right click and choose "insert template"). Quartus is often confused about exact syntax when inferring IP, for example reading four entries at a time might cause problems.
If you're still having problems, run the embedded memory IP wizard and choose your rom.txt file as the ROM contents.

If you send a support request to Intel, I'm pretty sure this is what they will tell you to do. Note that both of these options probably involve changing your hex file to have 32-bit entries instead of 8-bit.

Quartus Prime compilation ROM

1 Answers