How to decode fixed point (VHDL) number in HPS using c language?

0
votes

I am using Altera de0 nano soc FPGA. I am having number with decimal points stored in fixed point type (5 downto -27) (the number is always positive). I put it to std logic vector (32bit) and sent to HPS of soc FPGA via Avalon interface. but i do not know how to decode this received number back to c floating point number in (c language). how to do this?

I used fixed_pkg

library ieee_proposed;
USE ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee_proposed.float_pkg.ALL;
use ieee_proposed.fixed_pkg.ALL;
use ieee_proposed.fixed_float_types.ALL;
1
vhdlfpgafixed-pointintel-fpgasoc
So you can receive the 32-bit value, and want to convert if to double in C? Then this is a C question, not a VHDL question. I.e. information is minimal and tags are incorrect. – JHBonarius
Please don't ask two questions in one topic – JHBonarius

1 Answers

0
votes

Assuming you 1-on-1 mapping a ufixed(5 downto -27) to std_logic_vector(31 downto 0) and then sending it over the Avalon bus.

#include <math.h>

double ConvertToFloatingPoint(unsigned long inputValue)
{
    return (double)inputValue / pow((double)2, 27);
}

I.e. 22.8125 (ufixed) => 3061841920 (unsigned std_logic_vector) =over bus=> 3061841920 (unsigned long) => 22.8125 (double)