0
votes

I am using Altera DE0 nano SoC FPGA. I want to know how to send a floating point number to FPGA from HPS.

Let a float ex_hps = 6000.9282; sent via Avalon memory mapping interface. If Avalon_write_data address has 32 bits data length (which can be set from Qsys), in FPGA side this number is stored in a 32-bit std_logic_vector right?

Does this std_logic_vector contains the float number as fixed point type (13 downto -14) with original value? or how to put this number back to a fixed point number ex_fpga(13 downto -14) in FPGA side in VHDL?

1
You should find, read, and understand the standard that defines the binary representation of 32 bits floating points. Next, you'll understand that the same representation can be used both in your FPGA and your CPU.Renaud Pacalet
6 downto -6 is 13 bits, not 32... Missing information here. And 737692.928203 will not fit in a ufixed of 6 downto -6.JHBonarius
@JHBonarius I did correct the questionkomto909

1 Answers

0
votes

This is something you could have looked up yourself.

You need to map the float to an integer in C first, using the knowledge about the system.

#include <math.h>

unsigned int PrepareForTransmission(float inputValue)
{
    if (inputValue < 0) return 0; /* underflow error: clip */
    if (inputValue >= powf(2.0f, 14)) return (unsigned int)pow(2.0, 28) - 1; /* overflow error: clip */
    return (unsigned int)(inputValue * pow(2.0, 14) + 0.5); /* +0.5 to round */
}

Then in VHDL you can simply port unsigned std_logic_vector(27 downto 0) to the ufixed(13 downto -14). You (hopefully) know how to do that.