In context of ARMv7 what is the advantage of Linux kernel one to one mapped memory when mmu has to do a page table translation

Question

Linux kernel virtual address are one-to-one mapped. So by subtracting a PAGE_OFFSET to virtual address we will get the physical address. That is how virt_to_phys and phys_to_virt are implemented in memory.h.

My question is what is the advantage of these one to one mapping on the armv7 mmu, when the mmu has to do the page table translation when there is a TLB miss?

Is the only advantage of one to one mapping so that S/W can directly gets the physical address of respective virtual address by just subtracting PAGE_OFFSET or there is some other advantage on ARMV7 MMU page translation too?

If there is no advantage of 1:1 mapped memory over mmu page table translation then why we need page tables for 1:1 mapped memory. I mean mmu can do the operation in similar way of virt_to_phys instead walking all the page tables.

How would you propose implementing phys_to_virt() without a fixed 1:1 mapping? Also, the premise of the question seems a bit confused - yes, the MMU performs translation all by itself when the CPU simply accesses memory by VA, but that's an entirely separate thing from when the kernel needs to calculate VA/PA translations (for instance, passing DMA addresses to devices, bringing up secondary CPUs, or updating the page tables themselves). — Notlikethat
if there is no relation between 1:1 mapped memory and mmu page table translation then for 1:1 mapped memory why do we require page tables (in multi level page table we need to multiple access the memory), simply subtracting a PAGE_OFFSET will give the physical address. — AnshuMan Gupta
cuz the mmu always work with page tables it knows nothing about some kind of offsets. The 1:1 mapping is made just for convinience — Alex Hoppus
Huh? The MMU needs page tables, that's how it works. Besides, there is no 1:1 mapping for e.g. vmalloc or userspace addresses, the kernel linear map is a special case. — Notlikethat
@Notlikethat, you mean to say that addresses inside the kernel liner map range doesn't go via Page tables ? — Amit Singh Tomar

artless noise artless noise · Accepted Answer · 2015-10-25T19:15:35

My question is what is the advantage of these one to one mapping on the armv7 mmu, when the mmu has to do the page table translation when there is a TLB miss?

Your answer is partially in the question. The 1:1 mappings are implemented with 1MB sections so the TLB entry is smaller. Ie, a 4k page needs a level 1 and level 2 TLB entry and it only encompasses 4k of memory. The ARM kernel must always remain mapped as it has interrupt, page fault and other critical code which maybe called at any time.

For user space code, each 4k chunk of code is backed by an inode and maybe evicted from memory during times of memory pressure. The user space code is usually only a few hot processes/routines, so the TLB entries for them are not as critical. The TLB is often secondary to L1/L2 caches.

As well, device drivers typically need to know physical addresses as they are outside of the CPU and do not know virtual addresses. The simplicity of subtracting PAGE_OFFSET makes for efficient code.

Is the only advantage of one to one mapping so that S/W can directly gets the physical address of respective virtual address by just subtracting PAGE_OFFSET or there is some other advantage on ARMV7 MMU page translation too?

The 1:1 mapping allows for larger ranges to be mapped a one time. Typical SDRAM/core memory comes in 1MB increments. It is also very efficient. There are other possibilities, but these are probably wins for this choice.

Is the only advantage of one to one mapping so that S/W can directly gets the physical address of respective virtual address by just subtracting PAGE_OFFSET or there is some other advantage on ARMV7 MMU page translation too?

The MMU must be on to use the data cache and for memory protection between user space process; each other as well as user/kernel separation. Examining the kernels use of 1:1 mappings by itself is not the full story. Other parts of the kernel need the MMU. Without the MMU, the 1:1 mapping would be the identity. Ie. PAGE_OFFSET==0. The only reason to have a fixed offset is to allow memory at any physical address to be mapped to a common virtual address. Not all platforms have the same PAGE_OFFSET value.

Another benefit of the virt_to_phys relation; the kernel is written to execute at a fixed virtual address. This means the kernel code doesn't need to be PC-relative and yet can run on platforms with different physical addresses of the core memory. Care is taken in the arm/boot assembler code to be PC-relative as the boot loader is to hand control with the MMU off. This arm/boot code sets up up an initial mapping.

See also: Find the physical address of the vector table, an exception to the virt_to_phys mapping.
                Kernel data swappable?
                How does the kernel manage less than 1gb?
                Some details on ARM Linux boot?
                Page table in linux kernel - early boot and MMU.

In context of ARMv7 what is the advantage of Linux kernel one to one mapped memory when mmu has to do a page table translation

1 Answers