Where to find I bit and how to edit it to enable interrupts in ARM Cortex-M4

1
votes

In ARM Cortex-M4F MCU (TM4C1294NCPDT specifically), to deal with interrupts (GPIO interrupts), one of the steps to get the interrupts working is to clear the I BIT.

I searched a lot but I couldn't find any useful information about that, could anybody please tell me where to find that bit exactly and how to edit it if I need some special procedures?

And that will be great if I have been told where to find that information exactly after the explanation please (to learn how to answer myself on any other questions).

3
armembeddedmicrocontrollercortex-m
The data sheet for the device has documentation on how to program the GPIOs.. It also has some information on the NVIC (the main interrupt controller): ti.com/lit/ds/symlink/tm4c1294ncpdt.pdf Also, you may want to look at "Definitive Guide to the ARM Cortex-M3 and Cortex-M4" by Joseph Yiu which is a pretty readable guide to the Cortex ARM CPUs. Of course, the ultimate references are the ARM Architecture Reference Manuals, which can be downloaded from ARM's website: infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0403e.b/… – Michael Burr
There is also a generic programmer's guide for Cortex-M4 cores which may be useful. In addition, it seems like there might be some confusion here - "the I bit" sounds like it's referring to the CPSR of the 'classic' and A/R-class architectures, whereas on M-class the PRIMASK register does the equivalent job. Either way, in many situations it's simpler to use the cps instruction rather than poke registers directly. – Notlikethat
@MichaelBurr Actually I searched inside them all, but not in The Definitive guide to the ARM Cortex-M4, may be I didn't know how to search correctly. could you guide me please where can I exactly find the answer of my question there? – Mohammed Noureldin

3 Answers

4
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The CMSIS provides a standard cross-vendor software interface to Cortex-M based devices. The CMSIS defines a number of functions for interacting with the NVIC and PRIMASK including the intrinsics __disable_irq()/__enable_irq()

1
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The ARM Cortex-M interrupt system is quite complicated and very well thought. It consists of CPU registers and a tightly coupled interrupt controller (NVIC). Interrupts are prioritized and vectored. There is no single interrupt-enable flag as for smaller 8/16 bit MCUs.

For each interrupt, there are two ARM-core instances to gate the event to the CPU: The CPU PRIMASK register (single bit), which can be seen most similar to the classical interrupt-enable flag. Second is one enable bit in the NVIC. For these, there is an ARM standard in the CMSIS headers. These provide functions __enable_irq() and __disable_irq() for the PRIMASK bit. The peripheral interrupt itself has to be controlled by NVIC_EnableIRQ(IRQn_Type IRQn) where IRQn is the interrupt number as defined in the MCU-specific header file.

Finally, there are most times also interrupt enable bits in each peripheral module as know by the smaller MCUs.

Note that to have an interrupt pass through all gates have to be open (all bits set to "enable"). Use the CMSIS functions to manipuate the bits. They very likely will not take more instructions than a hand-crafted version.

Edit:

There is no actual need to fiddle yourself with assembler or the registers. Just use the CMSIS functions, you can very likely not do better yourself, but possibly worse. That's actually the intention of CMSIS.

(end edit)

Start reading in the reference manual for the MCU and the vendor's homepage. That should provide references and app-notes for the device. You also should read the technical reference manual, architecture reference manual from ARM. Actually, just have a close look at all related documents there for the CPU (M4 for you). These are for free, some require registering.

For the NVIC, you should not access it directly, but using the CMSIS header files as provided by TI for exactly this MCU (the headers require some device-specific settings). If not available,you can get them from ARM, but have to provide the device-specific settings yourself (they are few and are given in the MCU's reference manual).

As the ARM Cortex-M4 has multiple interrupts, you need their symbolic names to enable/disable. These have to be defined in the MCU header which defines all peripheral modules, too (there might be multiple such headers). The names end with _IRQn, just search for that.

To use the Cortex-M4 you should read the documents given, or you can try with a good book. However, as this is no tutorial site, nor is it allowed to recommend books, please search yourself.

0
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OK, the easiest answer for my question is:

To use " CPSID I" or " CPSIE I" inline assembly code which will set or clear the PRIMASK (I) Bit respectively. (of course that will work just in privileged mode).

And both assembly instructions are equivalent to __disable_irq() and __enable_irq() functions in CMSIS respectively.