As we know on x86 architecture the acquire-release consistency provided automatically - i.e. all operations automatically ordered without any fences, exclude first store and next load operations. (As said Herb Sutter on page 34: https://onedrive.live.com/view.aspx?resid=4E86B0CF20EF15AD!24884&app=WordPdf&authkey=!AMtj_EflYn2507c )
If we put MFENCE(LFENCE+SFENCE) between them, then store can't be reordered, and load can't be reordered - i.e. we provided sequential consistency.
But if we marked memory as WC(Write Combined), then do we have any consistency automatically without any fences, may be acquire-release?
Or if we use SSE instructions with WC-memory, then we have not any consistency, and if we use simple MOV instructions with WC-memory, then we have acquire-release consistency, isn't it?