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  1. My understanding of PCI
    The Host CPU is responsible for assigning the PCI domain address to all other devices on PCI bus by setting the devices BAR register in PCI configuration space

    The Host CPU can map the PCI address domain to its domain(i.e System domain), so that Host initiated "PCI Memory transactions" with devices on PCI bus can be achieved using simple load/ store instructions of the host CPU

  2. Question -> Is it possible that even the system memory i.e. the main memory of the host(actual ram) be mapped to PCI domain address, so that when Host system is a target device of the "PCI memory transaction" initiated by a device on PCI bus, the main memory is read/ written without the intervention of the Host CPU?

Additional Information: I am working of embedded system with 3 SH4 processors communicating using PCI bus

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2.. You are saying the PCI device acts as the master...I don't know of any of this configuration...RootPhoenix

2 Answers

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There are two kind of memory mapping in PCIe world. One is inbound mapping and the other is outbound mapping.

Inbound mapping : the memory space is located on the device and the host CPU can look up the mapped memory space. Outbound mapping : the memory space is located on the host CPU and the device can look up the mapped memory space.

Both of them seem to be same but it is a important difference. With this feature, you don't need to any additional memory copy to communicate between the host CPU and the device.

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I realize this is an old question but I'll like to answer it anyway. When you say "transaction initiated by a device on PCI bus", I assume you mean a read/write initiated by the device to access system memory (RAM). This is called bus mastering on the device (also referred to as DMA), and it can be done by having the host CPU allocate a DMA buffer (ie. with dma_alloc_coherent()), and having the driver provide this DMA address to the device. Then yes, the device can read/write to system memory without host CPU intervention.