What is a PCI address space?

Question

For example let's assume that a PCIe end point requests 1 MB (MMIO) of memory which would be mapped into the systems memory map (memory address space) by BIOS during enumeration process.

So whenever the CPU accesses that memory region, it will be directed to the end point device. I am new to PCIe and this is my understanding about how PCIe device is targeted using MMIO (from systems memory map).

I have read somewhere that PCIe bus uses PCI address space. So where exactly the PCI address space plays its role into this process? Where does the PCI addresss space present?

Explanation with an example would be more helpful.

Answer 1

PCI supports 3 address spaces:
1. PCI config space
2. I/O space
3. MMIO space

The method for accessing each of these address spaces depends on the system the PCI bus is connected to.

On x86 systems, the CPU accesses PCI MMIO directly using the same the physical address programmed into the device BAR. In this case, the PCI address space matches the CPU physical address space.

PCI config space on x86 systems can be accessed by software in either of two ways:
1. By writing the PCI config space register address to I/O port 0cf8h, and reading or writing the register value using I/O port 0cfch.
2. On any recent system, by using direct MMIO to a platform-specific address. In this case, the PCI register address is added to the base of the MMIO region to form the physical address used by the CPU.

On other types of systems, the method of accessing each of the PCI address spaces may differ. For example, the CPU may need to use an aperture in the CPU physical address space to access PCI MMIO space, similar to the way that PCI config space accesses work on x86 systems. On such a system, the PCI address space is different from the CPU physical address space.