See the Wikipedia entry on PCI configuration space. The PCI BAR bits are used to communicate memory addressing requirements, and are configured during PCI enumeration.
If the PCI device is 32-bit (meaning that it can only handle 32-bit addresses), it would probably set the "Locatable" value to "0" (any 32-bit), thus keeping the address below 4GB.
If the device can handle 64-bit addresses, it would set "Locatable" to 2.
Likewise, during configuration, the PCI device communicates its memory requirements via the BARs, and the OS finally sets the BAR addresses.
To quote the Wikipedia section in question:
When a read to a specified BDF combination vendor ID register succeeds, the BIOS or OS knows it exists. It write all 1s to the BARs, and read back the devices requested memory size in the form of 0s where don't care address is. (sic)
To summarize:
It depends on the capabilities of the device hardware.
During PCI device enumeration, once the host OS has found a PCI device, it uses the BAR bits to ask the device for memory address location information. It uses the BARs themselves in a two-step process to firstly establish the memory size requirements then configure the base address.
