0
votes

Just as an example, I want to know exactly which of the x86 processor families support the fisttp instruction. I'm pretty certain that it's supported on the Pentium 4 and beyond, but I'd like to have some official verification of that. And more importantly, I'd like to know if it is supported any further back: is it available on the Pentium III?

I tried all the obvious Google search terms, but there's hardly anything at all available online about this particular instruction. And even if there was, that's not a good general solution.

I know about the Intel IA-32 Architecture manuals, available online here. Looking at the Instruction Set Reference, A–Z, I can find the instruction that I'm interested in and plenty of interesting information about it. But nowhere in that manual does it tell me which processor families support each instruction, or even when it was first introduced.

I tried to find older copies of this manual (i.e. for the Pentium III family), but I came up empty—all the links point back to the above-linked page with the current versions of the manual. Besides, that's a lot of work to dig up the manual for each family and see if the instruction I care about is there.

Surely this information is something that other people look up frequently… What resource do they use?

Note: For careless readers, please note that I'm not asking how to determine this information programmatically at run-time. I want to do it sitting at my desk.

2
I use wikipedia. For example, for fisttp I'd look at the wikipedia article of SSE3, and it has a pretty handy list of "processors supporting SSE3". Doesn't always work well. For instructions that don't belong to obvious instruction set extensions, sometimes looking here worksharold
@harold Ah, nuts. Wikipedia! Of all things! I should have checked there, too. But I still wonder what people did in the pre-Wikipedia era...Cody Gray
ref.x86asm.net is also a good place to lookDrew McGowen
There are other resources that have been around for a long time. For example, masm32 includes a document that lists all instructions and on which models they are supported (though only up to and including 80486). Sandpile also has such info and has been around for quite long IIRC. And of course, some assemblers had directives like .386 and .486 where you could tell the assembler only to allow instructions available on a certain model.Michael

2 Answers

7
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In general, there actually can’t be a tidy answer here. While the “bigger” instruction set extensions (SSE, SSE2, ..., AVX ) tend to be accretive (in the sense that once they’re added, they don’t go away), there are lots of smaller ISA extensions as well (AESNI comes to mind, as does TSX) that Intel regards as optional; well after they are initially added, individual processors within a family may include or exclude the feature depending on how much money you pay.

Taking AESNI as an example; these instructions were added in Westmere/Clarkdale/Arrandale, but only the i5 and i7 variants had them (IIRC, they were disabled in some of the i5 SKUs too). In the next generation (Sandybridge), they were again i5 and i7 only, and according to Wikipedia, were sometimes disabled in the BIOS as well. In Ivybridge, they are still i5/i7, except for one or two high-end i3 SKUs.

So, although one can make broad statements about SSE, SSE2, ... , SSE4.x, AVX, AVX2 that are “mostly” correct (or even correct for all CPUs shipped to date), the only really correct answer is to check if an instruction is available at runtime by looking at the appropriate feature bit as Intel suggests. Which is exactly the answer you don’t want. Sorry.

To the more general question of “how do I approximately answer this”, wikipedia is a pretty good reference. For specific processor models instead of families, use ark.intel.com.

5
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Actually, you have the answer there already: The best resource to find such information is in the CPU manufacturers' documentation.

If you look carefully, the The Intel manual you (almost) link to has all the information you need on your example FISTTP: it is explicitly listed as an SSE3 instruction (see here: Vol 1, Section 5.7.1 of Intel 64 and IA-32 Architectures Software Developer’s Manual, June 2013). This implies that any CPU which supports the SSE3 instruction set, should support FISTTP.

As far as modern instruction sets go (SSE, AVX, BMI, ..., you name it), the Intel manuals really do a good job of detailing which instruction sets (and associated CPUID feature flags) any instruction belongs to, pretty much back to the instructions that were around when CPUID was introduced (late 80486 CPUs). With this information, it becomes easy to figure out which CPU model supports a given instruction.

I am not sure about how well the Intel manuals would work for figuring out when really ancient things were introduced (for CPUs up to the 486 I have an old hard copy Microsoft MASM Reference manual from 1992 that details these things). But I would be surprised if this info wasn't google-able -- anyway these really old changes (like introduction of BT instructions on the 386) are nowadays probably only interesting from an academic standpoint anyway.