Verilog 4 bit multiplier?

0
votes

I'm having problems on how to create a test module for the following Verilog code:

module Multiplier_4bit(output [8:0] y, input [3:0] i1, input [3:0] i2);
assign y=i1*i2;
endmodule

I thought of the following test module:

module M4_Tester
reg [3:0] i1;
reg [3:0] i2;
wire [9:0] y;
initial begin
i1=5;
i2=3;
$finish();
Multiplier_4bit device1(
  .out(y),
  .in0(i1),
  .in1(i2)
);  

endmodule

Please correct me if I'm wrong and sorry for bad english, as I am not a native speaker. Thanks in advance.

1
verilog

1 Answers

2
votes

  1. You cannot instantiate a module inside of a begin block (put the multiplier somewhere outside of your initial begin block.

  2. You have no corresponding end which closes the initial begin block.

  3. Your simulation will terminate instantly because there is no delay between setting the values and the $finish. Put some nominal time delay before the simulation finishes with #10 $finish().

Next time please clarify your question before asking, and post the actual error messages you are receiving.