1
votes

The following code used to implement the instruction

sllv $s0, $s1, $s2

which uses the least significant 5 bits of the value in register $s2 to specify the amount register $s1 should be shifted left:

          .data
   mask:  .word  0xfffff83f
          .text
  start:  lw     $t0, mask
          lw     $s0, shifter
          and    $s0,$s0,$t0
          andi   $s2,$s2,0x1f
          sll    $s2,$s2,6
          or     $s0,$s0,$s2
          sw     $s0, shifter
shifter:  sll    $s0,$s1,0

I know what most of those instructions are doing.

I don't however understand how the second load word is loading something from shifter which itself is an instruction and not a word.

Also the value of the mask in hex when converted to binary doesn't have zeroes in the least 5 significant places as the question says so I am not sure how it will mask the least 5 sig places.

1
you need to tell us what architecture and what processor this is for. Without that we can't tell you what it does.Spence
You'll likely get more help if you make your question more specific. Is there a particular instruction you're having trouble understanding?Charlie Salts
Are you familiar with any of those instructions? A good faith attempt at translating as much as you can will go a long wayDrew Dormann
its for MIPS architecture en.wikipedia.org/wiki/MIPS_architectureanon
I know what most of those instructions are doing. I don't however understand how the second load word is loading something from shifter which itself is an instruction and not a word. Also the value of the mask in hex when converted to binary doesnt have zeroes in the least 5 significant places as the question says so I am not sure how it will mask the least 5 sig placesanon

1 Answers

2
votes

That's kind of a round-about way of doing it. It's actually modifying the instruction in-memory to perform the shift! If you follow the code, you will see that the sll $s0,$s1,0 instruction is loaded, has its sa field modified from 0 to $s2 and then saved back into memory and executed.