I've been having some issues with some VHDL code I wrote (see my other question for details if you're curious: VHDL integer'image Returns "0"). I need some way to see what is happening to my variables. Everything I read seems to indicate that I should be able to use the 'report' statement to see some output, but nothing I've read tells me where I would see this output.
So my question is this:
I'm writing VHDL code and programming an Altera DE2 FPGA board... Can I use the report statement to get some output, and if so, how? Currently I'm using Altera's Quartus II software. I tried to install ModelSim, but the student edition does not seem to work on Windows 7 (I can't even get an installer to show up... running the setup just leaves a dangling process).
Thanks!