A low logic level turn on LEDs and high logic level turn off LEDs in quartus with Altera Cyclone FPGA

1
votes

I have a development board with an EP4CE6E22C8 FPGA. And I have the following verilog code in Quartus Prime:

module Test(out);

output [7:0] out;
assign out = 8'b00111100;

endmodule

The pin planner has been configured as pointed by the schematic. The problem is that 0 turn on the LED and 1 turn off the LED. I think this is a strange behaviour since the typical one is 1=on and 0=off.

Anybody know if there is any option (in pin planner, quartus prime or whatever) to change this behaviour?

Thanks.

1
fpgaquartusintel-fpga

1 Answers

1
votes

The behavior is a function of the board and how the LED was hooked to the PIN. Externally, a low is required to activate the LED.

You can change the behavior though through abstraction which is always useful.

module Test(out);

output [7:0] out;
wire   [7:0] my_led;

// The application layer
assign my_led = 8'b11000011;  // All inverted from the original

// The hardware abstraction layer
assign out = ~my_led;  // Bitwise invert make the polarity as you desire.
endmodule