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I have developed a custom STM32L475 board with one GPIO pin wired up for synchronization along some other circuitry for the synchronization, unfortunately we decided to route the generated sinus signal from module to module. This is not optimal so I want to optimize so it is not the sinus signal which is routed from master module to slave modules, but to just transfer a digital trigger to restart the generation of a full sine wave.

To do this I need to be able to setup the MCU's to use the one GPIO pin on each MCU as both output and trigger for a timer.

To do this without an update of the HW I need to be able to combine: 1. Using the 3 pins (one from each MCU) as open drain outputs as an AND gate, this works. 2. I know the GPIO pin can be used as external trigger, triggering on a negative edge.

The question is, is it possible to trig a timer of an output pin using only one GPIO pin, to make the MCU which finalizes its sine generation first trigger itself and the other MCU's, and if so, how? Please note, it must use the level of the output pin itself, eventhough it is an outputpin.

I am a HW developer, learning to do firmware for our HW, so I am kind of new to software development, so I am using HAL, please be nice

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1 Answers

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STM32L475 allows to configure a GPIO in different modes that must be (exclusively) selected through the corresponding GPIOx_MODER register:1

  1. (Digital) Input mode
  2. General purpose output mode
  3. Alternate function mode
  4. Analog mode

The alternate function applied in Alternate function mode must also be selected exclusively, through the corresponding GPIOx_AFRL or GPIOx_AFRH register, resp.2

The trigger for an interrupt or timer is an alternate function, and the output of a (analogue or digital) signal is a (different) alternate function, too. Therefore, I think there is no solution to the given problem based on peripheral configuration.


1Reference Manual, Rev 7: See

  • Section 8.5.1 for GPIO mode selection
  • Figures 23/24 in Section 8.4 for explanation

2ibid.: See

  • Section 8.5.9 for GPIO alternate function selection
  • Section 8.4.2 for explanation