Where is the most significant bit of the immediate value specified by a I-type instruction?

Question

I am now constructing a simple risc-v processor with the help of logisim. Regarding the I-type instruction:

I know that the instruction is defined as follow:

[0:6] => opcode (to determine what ALU needs to calculate)

[7:11] => rd (destination register to store the answer)

[12:14] => also part of opcode

[15:19] => rs1 (source register storing the value to be added with an external immediate value)

[20:31] => imm (the immediate value)

As the architecture is going to be in 32-bit, the 12-bit immediate value needs to undergo sign extension before being added with the content inside rs1. So the place I got confused is which end of "imm" locates the most significant bit (20th bit / 31st bit)?

usually bits are enumerated from right (less significant) to left (most significant), sign bit usually is stored in most significant, ie leftmost bit, ie 31th — Iłya Bursov
@Iłya Bursov yea for human readability usually the leftmost bit is the MSB. I just worried if the connection would be messed up if I misinterpreted the bit configuration. Thanks a lot anyway for your clarification! — NiC

Eraklon Eraklon · Accepted Answer · 2020-03-10T19:21:07

The RISC-V specs state the following at page 16:

"In particular, the sign bit for all immediates is always in bit 31 of the instruction to speed sign-extension circuitry."

Since the sign bit is the most significant one, therefore it is the 31th bit.

Where is the most significant bit of the immediate value specified by a I-type instruction?

1 Answers