Set Associative Cache - How many memory blocks map to a set?

Question

I'm studying for a final and I have the following example problem with professor answer:

Question

An instruction cache (I-cache) has a storage capacity of 524288 bytes and employs 128-byte cache lines. The memory with which the cache is used is 209715200 bytes in size. How many different memory blocks could potentially map to set 10 within the 4-way set associative cache?

Answer

Any memory block whose block number has bits 16 through 7 equal to 0000001010 would map to set 10. Since the memory is 209715200 bytes in size (=0xC800000), so only the low 28 bits of the address will ever be none-zero. That is, at most 28 bits are needed to specify any address within the memory. So the upper 28-10-7 = 11 bits would determine how many different blocks map to an individual set. The value in the upper 11 bits range from 0 to 11000111111 = decimal1599. So 1600 different blocks map to set 10 within the 4-way set associative cache.

Can anyone explain this answer? I am particularly confused about the following items. I thought the upper 11 bits were the tag. Why would this have to do with whether it maps to set 10 or not. I also don't understand where the upper bound of 11000111111 for the 11 bits came from?

Answer 1

You are correct. The tag is the upper 11 bits. But what the poorly worded explanation is getting at is that the tag corresponding to the physical memory will never be mapped to greater than 11000111111, because the physical memory with a size of 0xC800000 has an upper limit of that number. In other words, a tag greater than 11000111111 will map to a physical address of 0xC800001 or greater.

Essentially to find the number of blocks that a set can be mapped to, just count the number of tag possibilities that there can be given the size of the physical memory and the size of the set bits and offset bits.