My Makefile contains an implicit rule override in the form of an explicit rule definition. However, make still invokes the default implicit rule.
This is on RHEL 6.3, GNU Make Version 3.81.
CPPFLAGS = -Wall -O2
DEPDIR = .d
DEPFLAGS = -MT "$@ $(DEPDIR)/$*.d" -MMD -MP -MF $(DEPDIR)/$*.d
SRCS = $(wildcard *.cpp)
OBJS = $(SRCS:.cpp=.o)
%.o: %.cpp $(DEPDIR)/%.d
g++ -c $< $(CPPFLAGS) $(DEPFLAGS) -o $@
$(DEPDIR)/%.d: $(DEPDIR) ;
$(DEPDIR):
mkdir -p $@
include $(wildcard $(DEPDIR)/*.d)
.PHONY: clean clobber
clean:
rm -f *.o
rm -rf $(DEPDIR)
Invocation of 'make' outputs this:
[tlytle@tlytle-dev]$ make
g++ -Wall -O2 -c -o my_source.o my_source.cpp
Why is make invoking the default implicit rule for %.o files and not my explicit rule for %.o files defined in my Makefile?