Makefile Automatic Dependency Generation (%.o)

Question

I want to make a flat layout of *.[cpp,h] files using the automatic dependency management trick staged here: http://locklessinc.com/articles/makefile_tricks/

My work is:


.PHONY: all clean

CXX ?= g++
DEBUG ?= "1"

ifeq ($(DEBUG), "1")
    CFLAGS+=-g
endif

BODIES := ExecuteStart GraphNode IdNodeMap IdValuePairCollection IScenarioReader XMLScenarioReader INodeExecute
SRCS := $(addsuffix .cpp, $(BODIES))
OBJECTS := $(addsuffix .o, $(BODIES))
DEPS := $(addsuffix .d, $(SRCS))

dependless = %.o %.a %.d %.h
expand = $($(var)) $(var) $(var).d
depend_test = $(if $(filter $(dependless),$(var)),$(var),$(expand))
depend = $(sort $(foreach var,$(1),$(depend_test)))

default: all

include $(wildcard *.d)

& = $(filter-out %.h %.d,$^)

all: $(OBJECTS)

%.cpp.d: %.cpp
    @echo creating $@ for $ $@'

clean:
    rm $(OBJECTS) $(DEPS)

The problem is that the rule %.o: $(call depend, %.cpp) is not working and hence if I make --warn-undefined-variables it warns about %.cpp. The result being make figures out how to produce *.o files and doesn't use my rule.

Do I have a skipped issue?

udslk udslk · Accepted Answer · 2012-06-18T19:15:37

I found the horrible miss in the rules:

all: $(DEPS) $(OBJECTS)

That fixed the issue. But it needs explicit "generate dependency" rule added to all.

Makefile Automatic Dependency Generation (%.o)

1 Answers