Cannot setup Cortex M7 ITM properly on STM32H7

Question

I'm working on STM32H753 (STM32H753I-EVAL2 board) using STM32CubeIDE and I'm trying to setup the ITM.

I've started by enabling SWV in the Debugger setting (of course I selected SWD) with Core Clock 400MHz (my CPU clock) and SWO clock 2MHz.

Then in my code I defined the following macro:

#define ITM_Port(n) (*((volatile unsigned long *)(0xE0000000 + 4*n)))

and call this macro as follows, at the location of my code where I want to get a timestamp.

ITM_Port(20) = 0x10;

Finally, in the debug session, I enable ITM stimulus port number 20 and Timerstamp, and launch the SWV Trace Log.

However I don't understand the output:

If I remove the calls to ITM_Port, the trace is empty...

I checked the registers ITM_TCR and ITM_TER and they look correct. Stimulus port 20 is indeed enabled in TER. In TCR, bits ITMENA, TSENA, SYNCENA and TXENA are set.

I looked at assembly level (that looks correct) and I noticed that the store instruction that is supposed to write 0x10 into ITM_STIM20 has no effect,the register is not modified. Is there something to unlock / enable ?

I also configured the GPIO PB3 with alternate function SWO.

Any idea ?

Setup ITM for what? What do you want? Also please fix this thread link. — Stephen Plyaskin
"Setup ITM for what? " As written, "at the location of my code where I want to get a timestamp". I also want to use ITM to count instructions. — Guillaume Petitjean
Data in "Data" field have some pattern. Maybe this is trace paket content? I suppose this is host software issue. I would like to sniff data by logic analyzer on SWO — Stephen Plyaskin

HelpingHand HelpingHand · Accepted Answer · 2020-04-14T22:54:57

[...] I noticed that the store instruction that is supposed to write 0x10 into ITM_STIM20 has no effect, the register is not modified.

Please re-check the read/write semantics of this register in the Reference Manual, page 3222:

Write data is output on the trace bus as a software event packet. When reading, bit 0 is a
FIFOREADY indicator:
  0: Stimulus port buffer is full (or port is disabled)
  1: Stimulus port can accept new write data

Therefore, I don't believe that there must be a mistake around this register.

The trace log screenshot in the question shows plenty of ITM trace packets at other ports (24, 25, 26, 28, 29, 30, 31). Please take care not to overdo the ITM trace packet creation: The question refers to SWV Trace Log, so the trace packets of different ITM ports must all pass through the same SWO line. That interface is not very fast (while the CPU of STM32H7 certainly is!), so software-triggered ITM packet creation can easily choke this bottleneck so that packets are discarded. The question doesn't contain the surrounding code where trace packets are created, but my guess is that during the analysis, inserting additional ITM packet triggers at a finer level (inside loops or so) increased the port traffic until lost packets weren't even noticeable.

The easiest way out may be to remove parts of the ITM triggers (or, to activate only few ITM channels at a time, which will filter packets in ITM before they are transmitted through SWO) and measure different aspects at a time, repeating the measurement with different ITM channel selection.

The second easiest way is to spend a few k$ on a debug adapter that supports the synchronous trace port. This feature is only supported by high-end adapter variants such as J-Trace, Lauterbach, etc. - it is usually targeted at ETM tracing, but you can also use the parallel TPIU interface to output ITM data, probably at a higher rate. This strategy isn't the most elegant in the described situation - please consider the other way first!

Cannot setup Cortex M7 ITM properly on STM32H7

1 Answers