0
votes

My setup is the following: a Nucleo board (Nucleo 144 embedding a STM32H743) is configured as SPI Master. Another identical board is configured as SPI Slave.

For the Master I setup the SPI1 (pins GND, D11, D12 and D13 - PA5,6,7- of the CN7 connector) with following config:

  • GPIO: very high speed, alternate function 5
  • SPI: prescaler DIV8, interrupts enabled, simplex communication, no Slave Select
  • all clocks set to maximum (CPU 400MHz, etc...)

For the Slave I setup the SPI1 too (same pins), it works fine.

Then I tried to switch to SPI2 peripheral for the Slave board and could not make it work (no change to master board). I chose the pins D18 (PB13) for SCK, A7 (PC2) for MISO and A2 (PC3) for MOSI.

I've checked the following points:

  • SPI2 periph clock is enabled
  • GPIOB and C clocks are enabled and pins PB13, PC2 and PC3 are set up the same way as PA5,6,7 in previous setup.
  • for the GND I tried different GND pins on the board, I don't know if it makes a difference.
  • the GPIOs used for SPI2 are not used elsewhere in my code. I've got them from the datasheet of STM32H743ZI

What I see:

  • my slave is still receiving the SCK signal correctly: I get the correct number of RXP interrupts.
  • the data received by the slave is corrupted.
  • however the data send by the slave to the master is correct.

I think the MOSI signal is badly configured, either physically or logically. I tried the other GPIO pins whose alternate function can be SPI2_MOSI but same behaviour.

Is there a specificity to SPI2 and/or this GPIO setup ? Does the GND location on the board matter ?

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1 Answers

0
votes

I "fixed" (?) the issue by setting a pull-down to the SPI2 input GPIO on Slave side. I don't really understand why it was working without pull-down on SPI1 neither why this pull down is needed on a Slave ?