0
votes

For a VMM using Intel VT-x, why would someone want to set the external-interrupt exiting bit in the VMCS to 0 rather than use posted interrupts (assuming that the architecture supports both)?

For example, if you set the external-interrupt exiting bit to 0, now interrupts that are destined for the host OS will delivered to the guest OS if the guest is running. How would this be dealt with, if the guest also uses the same interrupt vectors? This issue is not a problem with posted interrupt processing.

1
This might be used on hybrid hypervisors in the parent partition VMCS where the drivers are in the parent partition and the host OS actually runs as a guest. I can't see this being used on a type 2 hypervisor driver though as you say.Lewis Kelsey

1 Answers

2
votes

There are many different ways to design VMMs that use VMX. It seems from your use of the term "host OS" that you may be considering one specific VMM architecture.

Since the external-interrupt exiting control is in the VMCS, the VMM can set it differently for each VM. If there is a host OS and a guest OS, then the VMM would surely set the external-interrupt exiting control to 1 in the VMCS for the guest, but may set it to 0 in the VMCS for the host OS. (In some VMM designs, the host OS runs in VMX root mode or with VMX off, so this wouldn't apply; but in some VMMs, the host OS (also called a service OS, root partition, or Dom0) runs in a VM.)

Regarding why the VMM might do this instead of setting the process posted interrupts control, here are several possible reasons:

  • The VMM was written before posted interrupts were available.
  • The VMM is designed to work on platforms that don't support posted interrupts.
  • (possibly) Direct delivery of interrupts takes less processor time and power and is lower latency than using posted interrupts.
  • Posted interrupt processing is designed to handle interrupts that are assigned to a guest vcpu. The guest vcpu may not be currently running, and when it is running, the physical CPU it is running on may vary. Also, posted interrupt processing supports the case where interrupt delivery may be deferred until the vcpu resumes.
    If the VMM wants host interrupts to always be delivered immediately to the physical CPU indicated in the interrupt destination, there may be no value in using posted interrupts for those interrupts.