simulate an LVDS soft core IP

0
votes

I am trying to simulate the LVDS soft IP on MAX10 FPGA using modelsim-altera

it works fine with the receiver but when simulating the transmitter, I get these errors:

Loading fiftyfivenm.fiftyfivenm_ddio_out(behavior)

# ** Error: (vsim-3033) nofile(38): Instantiation of 'dffeas' failed. The design unit was not found.

# Time: 0 ps Iteration: 0 Instance: /top/ttx/ddio_out/loop0(0)/ddio_outa/inst File: nofile

# Searched libraries:

# C:/Users/alphatec/Desktop/test_sim/lvds_tx2/simulation/modelsim/rtl_work

Thanks for helping

1
vhdlmodelsimintel-fpga
A single error. verror tells us vsim Message # 3033: The specified design unit could not be found for instantiation. If the specified design unit does not contain a library indication then this message should be followed by a list of libraries that were searched when trying to locate a matching design unit. The question isn't a minimal reproducible example. Without seeing the instantiation, because it's an error it's likely an instantiation of an entity that can't be found. An unbound instantiation of a declared component is not a VHDL error. DFFEAS is an Altera/Intel primitive, found in an altera library. – user1155120

1 Answers

0
votes

If you are using Modelsim-Altera, please make sure you use library 'altera'. 'dffeas' is in that library. From command line, it should be similar to below

vsim -L fiftyfivenm_ver -L altera $YOUR_OWN_TESTBENCH

From GUI, make sure you add libraries before you start simulation.

Add libraries to Modelsim