Are the Physical Page Numbers in this diagram the same between all?

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I'm currently reading a text book on xv6, and understand this so far ...

Virtual Address: First 20 bits to index into a PTE. The PTE takes these 20 bits and turns them into a Physical Page Number: PPN. The remaining 12 bits are used for offset, which will be the same in both virtual and physical addresses.

Paging: Paging hardware uses first 10 bits of 20 bits in the virtual address to select a page directory entry (PDE). If a PDE is present, uses next 10 bits of virtual address to select a page table entry (PTE). Something like this ...

00 0000 0011 | 00 0000 0010 | 0000 0000 0101

Page Dir. (3) | Page Table E. (2) | Offset (5)

Question: Is the PPN showed in the diagrams the same all across? I also know the difference between a page directory and page table entry is only by 1 bit, which is set to 0 or 1 depending if you are at page directory or table. Is the PPN common between all 3 then? (Physical Address, Page Table, Page Directory).

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operating-systempaging
What do you mean by "the same all across" ? – Tony Tannous
@TonyTannous According to the diagram the PTE, PDE, and Physical Address all have PPN for their front 20 bits. Is this the same between them all? – Jacob Macallan
I am still confused by the question. – user3344003
@user3344003 I was just wondering if the PPN described by the PDE and PTE is the same PPN in Physical Address? – Jacob Macallan

1 Answers

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Hopefully, this answers your question. If you access a 32-bit address, 12-bits are saved for the offset into the page. They play no part in address translation.

The CR3 register points to a page table directory. Although not specified in your diagram, I believe this points to a physical page frame. That page frame contains an array of directories. The top 10 bits in your address are an index into that directories.

So now you have a structure like the one in your diagram. That structure contains a pointer to a physical page frame (PPN) containing a page table. Again this is physical address that would be padded with zeroes. You use the value in the PPN field to find the page table.

Your page table is an array of structures that look just like the directory. What is misleading in your diagram is that the D bit may or may not be set in a page table while it is always clear in a directory. The next 10 bits in your address are an index into this table. Use those to locate the desired page table entry.

As before you have a PPN. On this second iteration, this is a pointer to a physical address BUT now it is the actual memory page you want to access. Pad the 20 bits of the PPN with zero and add the lower 12 bits of your address and you have the physical address.