Converting a 2D array into 3D array in systemverilog

0
votes

I have an 2 D dynamic array as 

      logic [511:0] array[];

I wan to convert it into a 3 D dynamic array defined as

     logic [32][16]M[];

eg.

    array[0]= 1110110000111000...512 bits....

    M[0][0]=  1110110000111000...32 bits....
    M[0][1]=  next 32 bits....

and so on.

Can some please suggest how to accomplish this task.Did I declare my 3D array properly.I know dynamic array can only be defined in unpacked array. Can I define array as

    logic [31:0] M[16][]; ?

Any suggestion or correction would be helpful.

1
system-verilogdynamic-arrays
there is a big difference between logic [31:0][15:0] M[] and logic [31:0]M[16][] Which one do you need? - Serge

1 Answers

0
votes

Based on the example you gave it seems as if you want a dynamic array of an unpacked array of 16 32-bit packed words. That would be:

logic [31:0] M[16][];

You can use a bit-stream cast to assign one type shape to another type shape as long as the number of bits in the source can be fit into an exact match number of bits into the target. You need a typedef identifier for the target type (and it's a good practice to use typedefs in general when declaring variables).

typedef [31:0] my_3d_t[16][];

my_3d_t M;

M = my_3d_t'(array);

That does the assignment as 

M[0][0][31:0] = array[0][511:480];
M[0][1][31:0] = array[0][479:448];
...
M[0][15][31:0] = array[0][31:0];
M[1][0][31:0] = array[1][511:480];
...