I'm having some doubts about how kernel physical and logical addresses are handled by the MMU. I'll try to explain my question doing an example. Let's doing the assumption that we are on an ARM architecture.
The system starts with the MMU off, so all the addresses which pass inside the CPU are physical. Before we enable the MMU we make a page table where we say that all our physical addresses are mapped at the virtual addresses physical address + 0xC0000000. After this we turn on the MMU. All of this is clear. But now questions start:
Since we are in a pipeline architecture let's say that the instruction after is a load from the address 0x8000. Now for my knowledge here we should have a page fault since the MMU doesn't find this address anywhere inside the page table, so it's invoked a page fault for handle the situation. But also if we've set the interrupt vector, inside it there's a branch to another physical address, so the MMU doesn't find this address and we fall unavoidably in an endless loop. What am I missing?
