I'm trying to temporarily mask all interrupts of a Cortex-M3, with only having access to the debug port. I can read and write the memory freely, which so far has been sufficient for accessing processor registers.
My best bet so far was writing 1 to one of the core registers (either PRIMASK or FAULTMASK), and disabling all interrupts that way. The problem is, I can't seem to access them. According to the ARM infocenter, I can use the DCRSR to select core registers, and then read/write them via the DCRDR. However, the infocenter page seems to imply, that there is no way to access the interrupt mask registers (PRIMASK, FAULTMASK and BASEPRI).
I did find a different source, namely the Definitive Guide to the ARM Cortex-M3, which shows on page 244, that the DCRSR can indeed be used to access the special registers, by writing 0b10100 to it. I tried that too, and the value I read from the DCRDR afterwards seemed nothing like what you would expect from the special registers (reserved values were set to 1s or 0s randomly, the first bit of FAULTMASK was 1, yet interrupts seemed to work fine). I still tried setting the first bit of the supposed PRIMASK to 1, in hopes of disabling the interrupts, but to no avail. It seems that the infocenter was right, and the DCRSR can NOT be used to access all special registers.
My question is, what other way is there, to access the interrupt mask registers from the debug port? Is there a direct memory address at which they are stored, or some different register that provides access to them?
Any help is greatly appreciated.
