ARM Cortex-A9 Software generated interrupt only triggered once

Question

I'm working with ARM Cortex-A9 in a Zynq7020 and having problem with software generated interrupts.

When I generate (writing to the ICDSGIR register) a SGI in core ARM1 it is only triggered once and not again, more writes to ICDSGIR does not trigger the interrupt.

Generating a SGI in core ARM0 sent to ARM1 works fine but not ARM1 to ARM1.

Is there any special handling needed for SGI in the ISR? What could I have missed in the configuration?

What OS are you using? What is the interrupt driver doing? These can be masked. Each GIC has a private copy of some of the registers. — artless noise
Are you writing the indicated id back to GICC_EOIR at the end of your interrupt handler? — unixsmurf
@ unixsmurf: Thank you! That solved the problem, I had not realized that this was needed as the SGI from ARM0 worked fine. I would mark your comment as an answer if I could. — qnyz

Younes Regaieg Younes Regaieg · Accepted Answer · 2014-06-26T15:29:16

You probably should mark the end of interrupt by writing the interrupt ID along with the target processor to the ICCEOIR register:

ICCEOIR register http://i60.tinypic.com/2d7iwro.png

ARM Cortex-A9 Software generated interrupt only triggered once

1 Answers