So I am confused if the slave device/peripheral is clocked by SCL or some other clock.
Scenario, The Chip is running on lets say clock clk. this clk is divided based upon prescaler let the clock obtained (Mhz freq) be i2cclk,i2cclk is the freq at which the i2c master operates at., then i2cclk is further brought down to Khz to generate SCL.
But What about the slave side, which clock is fed to i2c slave, is it scl, or i2cclk or some other.
Why am I confused?
1.) I saw pics and specs of some I2C led peripheral and they are using scl itself as input clock to registers.
Now Led's are one - way transactions so I guess clocking at scl works
2.) And here's my theory But what if slave can also send data to master for eg. eeprom then if the slave clocks at scl,how will set data in the low period of the clock, also if it stretches the scl low how can it release it ?