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So I am confused if the slave device/peripheral is clocked by SCL or some other clock.

Scenario, The Chip is running on lets say clock clk. this clk is divided based upon prescaler let the clock obtained (Mhz freq) be i2cclk,i2cclk is the freq at which the i2c master operates at., then i2cclk is further brought down to Khz to generate SCL.

But What about the slave side, which clock is fed to i2c slave, is it scl, or i2cclk or some other.

Why am I confused?

1.) I saw pics and specs of some I2C led peripheral and they are using scl itself as input clock to registers.

Now Led's are one - way transactions so I guess clocking at scl works

2.) And here's my theory But what if slave can also send data to master for eg. eeprom then if the slave clocks at scl,how will set data in the low period of the clock, also if it stretches the scl low how can it release it ?

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Usually the serial peripherals and the "core", especially for slaves, are asynchronous. This means that the core of the receiver is clocked by one source (which is usually internal), while the i2c communication is clocked by the SCL signalfrarugi87
So are u implying that the LED peripherals and eeprom's etc other i2c slave devices would have an internal oscillator for the core operations and the i2c communication will take place at scl clock .??user2984602
Speaking about serial peripherals, not only I2C, usually the most simple ones (for instance shift registers) do not have a "core", so they are clocked by the clock line. The ones which require a clock (ADC, for instance) usually have another clock. I think that "higher level serial protocols", such as I2C, always mean that the main part has another clock, but I have no reference for this. Now, I don't know about your LED peripheral and the EEPROMs, but, for instance, the 24C01 datasheet tells "At this time the EEPROM enters an internally timed write cycle, tWR" (I think this "internally...frarugi87
... timed" means it has an internal clock or other synchronizing methods); LED peripherals with PWM capabilities have a PWM clock (internal or external), while the most simple can be simple shift registers. Nobody gives away the internal architecture of their product, thoughfrarugi87

2 Answers

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According to me 1) In I2C protocol CLOCK ( on SCL pin) will always generated by MASTER device. SLAVE will work according to it either it receive the DATA ( on SDA pin ) or it send the DATA. SLAVE can't generate the CLOCK.

2) All the process are desided by the MASTER. If MASTER wants to send the DATA to it will generate the CLOCK on SCL pin and generate the DATA on SDA pin. If MASTER need some data it will generate the CLOCK on SCL pin and now SLAVE will generate the DATA on SDA pin.

3) CLOCK stretching i.e. when SLAVE is busy it will connect SCL pin ( just for understanding ) to Ground. So that MASTER will come to know that the SLAVE is busy right now. And MASTER will not generate further CLOCK until SCL pin become high. So CLOCK stretching always done by SLAVE device.

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I am not an engineer, but a fairly experienced technician. Just learning I2C myself for a high end stereo system that I'm trying to bring back to life.

So here is my 2 cents worth- if you have a scope and you can look at the SCL lines between the master and the slave, you can get some idea of how fast they are running and what the waveform looks like. If it is a square wave, then by definition it is NOT the reference oscillator that you are looking at. Mine is external and made of discrete components- Two caps, two resistors and one crystal oscillator running in this case at 27MHz That one is a nice sine wave. The bus clock is much slower than this, probably on the order of 50 Khz or even less depending on the value of the pull up resistors used on the SCL and SDA lines and also the voltage used for the entire device. There is a relationship between the recomended voltage and the resistor value. My receiver is using a 3.3volt HDMI switcher with 1.8K pull up resistors. I'm not sure of the bus clock frequency, but I know it's way less than the crystal reference frequency and is digital as well. it will be referenced from the 3.3volts downwards if your device is powered by 3.3 volts. High with pulses going low when active . You should be able to get a data sheet and it will tell you what voltages to use.

Anyway, the I2C uses "active low" for write and High (pulled up) for read commands.

the master begins and ends the address and data streams and controls the bus unless the slave is not finished with the last operation in which case it can hold the SDA line low for as long as it needs to finish what it is doing (assuming that it is functional) You can learn everything about I2C online, but you definitley need access to the data sheets for all your devices and hopefully an oscilloscope as a minimum.

Good luck and I hope I answered your questions