Makefile: explicit entry works, wildcard % not working

Question

I have this rule in my makefile, but make didn't find it:

$(BUILDDIR)%.o : $(BUILDDIR)%.bin
    @echo
    $(OBJCOPY) -I binary -O elf32-avr --redefine-sym _binary_$*_bin_start=$* --redefine-sym _binary_$*_bin_end=$*_end $< $@

If I make it explicit, make will use them (called for build/rom1.o and build/rom2.o; BUILDDIR=build/)

$(BUILDDIR)rom1.o : $(BUILDDIR)rom1.bin
   @echo
   $(OBJCOPY) -I binary -O elf32-avr --redefine-sym _binary_rom1_bin_start=rom1 --redefine-sym _binary_rom1_bin_end=rom1_end $< $@

$(BUILDDIR)rom2.o : $(BUILDDIR)rom2.bin
   @echo
   $(OBJCOPY) -I binary -O elf32-avr --redefine-sym _binary_rom2_bin_start=rom2 --redefine-sym _binary_rom2_bin_end=rom2_end $< $@

Does anyone has a hint whats wrong with the wildcard in my first try?

Edit: The version of make is 4.1 running on Ubuntu 16.04. This is the error message from make when trying to run with the wildcard:

make: *** No rule to make target 'build/rom1.o', needed by 'build/rom1.elf'.  Stop.

Please define what you mean by "make didn't find it". What happened when you ran make? Also, please be sure to specify what flavor and version of make you're using and (sometimes useful) what operating system you're using. — MadScientist
Thanks. I don't see anything wrong in the parts of the makefile you've provided, so the issue must be somewhere else. You'll need to run make -d (it will generate a lot of output) and look for the part where it tries to match the pattern rule and see why make decides to not match it. I'm assuming that the build/rom1.bin file does exist. — MadScientist
This is the output trying to make rom1.o: Pastbin. I added a target before that listing all files in the build folder: rom1.bin as well as rom2.bin does exist. — Finn Stutzenstein

Shammel Lee Shammel Lee · Accepted Answer · 2017-06-02T06:21:03

Let's simplify the problem…

If this is your file structure…

.
├── Makefile
└── build
    ├── rom1.bin
    └── rom2.bin

and this is your Makefile…

BUILDDIR := build/

$(BUILDDIR)%.o: $(BUILDDIR)%.bin
    touch $@

and you run $ make build/rom{1,2}.o, your resulting file structure will be…

.
├── Makefile
└── build
    ├── rom1.bin
    ├── rom1.o
    ├── rom2.bin
    └── rom2.o

Makefile: explicit entry works, wildcard % not working

1 Answers