0
votes

I am writing a gnu make file to build and run C++ unit tests. I have the makefile put its .o files in the same directory that holds the make file.

We have a different set of makefiles used to build our products for delivery. Those makefiles puts each .o file in the same directory that has the corresponding C++ source file.

My unit test makefile defines its .o target as "%.o: %.cpp". In that makefile, I define VPATH to have the location of the .cpp files. In addition, my unit test compilation command generates and uses .d files using the g++ MMD and MP options.

So here is the problem I am having.

I want my unit test makefile target to only evaluate the .o target by looking in my unit test makefile directory.

If the product delivery makefile already generated a .o out where the source file lives, I still want my unit test makefile to only consider its directory to determine if I need to rebuild the .o file.

However, that's not happening. If a product delivery makefile had already put a .o where the source code lives, the unit test makefile sees that .o, and it says that the .o does not need to be built.

Is there a way for me to force my unit test makefile to only consider the unit test make file directory when evaluating .o file targets?

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1 Answers

1
votes

Are you saying that the .o file is found via your VPATH setting?

You can use pattern-specific vpath to restrict the lookup to specific types of files:

vpath %.cpp $(SRCDIR)

instead of setting the global VPATH