Makefile - generic target rule with src- and obj-files in nested directories

1
votes

I have code sorted in nested directories like

src/cmn/abc.cpp
src/voc/xyz.cpp

And desired object output should be

obj/cmn/abc.o
obj/voc/xyz.o

The Makefile entries are

SRC_FILES := src/cmn/abc.cpp src/voc/xyz.cpp
OBJ_FILES := $(patsubst %.cpp,*.o,$(patsubst src/%,obj%,$SRC_FILES))

The generic target rule is simple (too simple) and not working as desired. It creates the obj-files right next to the src-files as it misses pattern substitution. Further it misses directory creation (like obj/voc). 

.cpp.o:
        @$(CC) $(CC_FLAGS) $< -o $@

How should a target be defined to achieve the desired goals from above?

1
makefilegnu-make

1 Answers

2
votes

Since you're using GNU make already (patsubst) you might as well use pattern rules which are much more powerful than suffix rules:

obj/%.o : src/%.c
        @mkdir -p $(@D)
        $(CC) $(CC_FLAGS) -c $< -o $@