actual must be a static name -- indexing vector in portmap

Question

I'm thinking that this error is a result of GHDL not supporting VHDL 2008. The error occurs on line 27/28 when ff0 D is assigned the value from vector din. What is the proper way to index the vector from within a port map?

I created count_temp to try to bypass the error but it hasn't helped and I'd rather not have the extra variable. Thanks.

library ieee;
  use ieee.std_logic_1164.all;
  use ieee.numeric_std.all;

entity conv_encoder is
    generic (d_width : positive := 16);
    port (
        clk    : in std_logic;
        din    : in std_logic_vector(d_width-1 downto 0);
        ff_set : in std_logic;
        count  : in std_logic_vector(5 downto 0);
        dout   : out std_logic_vector(d_width*2-1 downto 0));
end conv_encoder;

architecture behavioral of conv_encoder is
  component d_ff is
    port ( clk, ff_set, D : in std_logic;
           Q : out std_logic);
  end component;
  signal a, b       : std_logic;
  signal count_temp : integer range 0 to d_width;
  begin
    count_temp <= to_integer(unsigned(count));
    ff0 : d_ff
      port map (clk    => clk,
                ff_set => ff_set,
                D      => din(count_temp),
                -- D      => din(to_integer(unsigned(count))),
                Q      => a);
    ff1 : d_ff
      port map (clk    => clk,
                ff_set => ff_set,
                D      => a,
                Q      => b);
    -- conv encoder is r=1/2 A=111 B=101
  process (clk, ff_set)
  begin
    if (ff_set = '0') then
      if (rising_edge(clk)) then
        dout(count_temp*2)   <= din(count_temp) xor a xor b;
        dout(count_temp*2+1) <= din(count_temp) xor b;
      end if;
    end if;
  end process;
end behavioral;

Error:

ghdl -a  conv_encoder.vhd
conv_encoder.vhd:28:30: actual must be a static name
ghdl: compilation error

ghdl -a --std=08 myfile.vhd (and supply the same flag to elaboration). Current ghdl releases (0.33 on) support quite a lot (not all) of VHDL-2008. But that's not your problem as Jeff points out. — user_1818839
IEEE Std 1076-2008 6.5.5.3 para 6 If the actual part of a given association element for a formal port of a block is the reserved word inertial followed by an expression, or is an expression that is not globally static, then the given association element is equivalent to association of the port with an anonymous signal implicitly declared in the declarative region that immediately encloses the block. The signal has the same subtype as the formal port and is the target of an implicit concurrent signal assignment statement of the form anonymous <= E... ghdl doesn't support this (yet). — user1155120
ghdl-updates RoadMap2008 VHDL 2008 new features, 6. Declarations, ⸰ anonymous signal in port clause. (And this is not shown as [Done]). — user1155120

scary_jeff scary_jeff · Accepted Answer · 2016-08-09T13:59:10

This is not a VHD2008 support issue in GHDL. Your two attempts at solving this are conceptually simple enough, but as the error says, you cannot connect a port to something that is not static. What this means in plain English is that you cannot associate a port with some combinatorial logic. Even D => not din(0) would not be allowed.

What I would do here would be to include a multiplexer. This can be as simple as:

signal selected_din : std_logic;

...

selected_din <= din(count_temp);

You would then replace the line D => din(count_temp), with D => selected_din,.

You could alternatively write a mux function, and your line would then look like D => mux(din, count_temp),. The function would return one element in din based on the value of count_temp.

Per the comment by @user1155120, this 'function' method is not supported by your GHDL compiler at the time of writing.

actual must be a static name -- indexing vector in portmap

1 Answers