call questa sim commands from SystemVerilog test bench

Question

I want to call questa sim commands like add wave ,add list, write list from my SystemVerilog test bench

task add_files_to_list();
add wave -position insertpoint  sim:/top/clk

add list sim:/top/clk 

write list -window .main_pane.list.interior.cs.body /home/simulation/top/example.lst

endtask

but the above doesn't work when i do from system verilog, i have to do i manually from tool. is there any way to do it. or can i call a tcl script from my system verilog code.

Thanks

Answer 1

 mti_fli::mti_Cmd("command")

See /examples/systemverilog/dpi/cpackages/test.sv