1
votes

I'm trying to use Intel's RDRAND instruction. According to the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2 (page 4-298), RDRAND produces 32-bit random values by default, even on 64-bit machines:

In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.B permits access to additional registers (R8-R15).

I'm trying to force the 64-bit generation using rdrandq, but its producing an error (/tmp/ccLxwW6S.s is due to the use of inline assembly):

$ g++ -Wall rdrand.cxx -o rdrand.exe
/tmp/ccLxwW6S.s: Assembler messages:
/tmp/ccLxwW6S.s:5141: Error: invalid instruction suffix for `rdrand'

How do I force the 64-bit version of the RDRAND instruction under GCC? How do I set the REX prefix when using RDRAND under GCC?

Thanks in advance.


In the code below, output is a byte[] with a length of size. safety is a failsafe. The two different word sizes handle the X86, X32, and X64 platforms.

#if BOOL_X86
    word32 val;
#else // X32 and X64
    word64 val;
#endif    

    while (size && safety)
    {
        char rc;    
        __asm__ volatile(
#if BOOL_X86
          "rdrandl %0 ; setc %1"
#else
          "rdrandq %0 ; setc %1"
#endif                  
          : "=rm" (val), "=qm" (rc)
          :
          : "cc"
        );

        if (rc)
        {
            size_t count = (size < sizeof(val) ? size : sizeof(val));
            memcpy(output, &val, count);
            size =- count;
        }
        else
        {
            safety--;
        }
    }

If I remove the explicit operand size from RDRAND (i.e., use rdrand rather than rdrandl or rdrandq), then I get an error when attempting to use the word64:

/tmp/ccbeXOvM.s: Assembler messages:
/tmp/ccbeXOvM.s:5167: Error: operand size mismatch for `rdrand'
1
Are you for any reason against using the _rdrand64_step intrinsic? - Michael Foukarakis
@Michael - I'd prefer inline assembly. RDRAND is easy enough to test for. Otherwise, I have to add additional tests to include headers, and worry about versions of GCC that don't support RDRAND intrinsics even though the underlying processor and the assembler supports it. - jww
Apparently the operand size is implicit for rdrand, even in AT&T-syntax. rdrand %e[rr] doesn't have a REX-prefix when using a low register, rdrand %r[rr] does. - EOF
You could always just write out the appropriate series of bytes: 48 0f c7 f1.. - Michael Foukarakis
As has been pointed out elsewhere, RDRAND is not doc'ed to accept a memory output. Also, there is a new feature for gcc that may be able to save you the setc. If your compiler version is recent enough (#ifdef __GCC_ASM_FLAG_OUTPUTS__), you can do something like do { asm("rdrand %1" : "=@ccc"(x), "=r"(l)); } while (!x); which gives you .L2: rdrand %eax jnc .L2. - David Wohlferd

1 Answers

0
votes

You don't need an operand-size suffix, just use it with a register of the appropriate size (which gcc will select based on the type of the C variable you use).


gcc main.c -o main

(or)

gcc -m32 main.c -o main

#include <stdio.h>
#include <stdlib.h>

int main(int argc, char **argv) {
  unsigned int rnd32;
#ifdef __x86_64
  long long unsigned int rnd64;
  /*
  The next instruction generates this asm:
  48 0f c7 f0             rdrand %rax
  */
  asm volatile("rdrand %0\n":"=r"(rnd64):);
   printf("\nRND64=0x%llx\n",rnd64);
#endif
  /*
  The next instruction generates this asm:
  0f c7 f1                rdrand %ecx
  */
  asm volatile("rdrand %0\n":"=r"(rnd32):);
  printf("RND32=0x%x\n",rnd32);
  printf("\nAssembler code:\n\n");
  system("objdump -d main|grep rdrand");
  return 0;
}

https://repl.it/@zibri/rdrand

Output (64 bit):

RND64=0x2f9f0e7d7f209575
RND32=0xbec8ff00

Assembler code:

   40054f:   48 0f c7 f0             rdrand %rax   
   400557:   0f c7 f1                rdrand %ecx

Output (32 bit):

RND32=0xa3d33766

Assembler code:

  59a:  0f c7 f0                rdrand %eax