LPC17XX SPI: Implementing pulse-sensitive(edge-triggered) interrupts

2
votes

I would like to implement a pulse-sensitive, aka edge-triggered, interrupt on an LPC1759 microcontroller. In the UM10360.pdf datasheet and ARM Cortex-M3 user guide, it says that interrupts can be triggered based on level- or pulse-sensitive behavior, but I am unable to find how to set this to be pulse-sensitive. Can someone please tell me where to set this?

For my particular application(interfacing the LPC1759 with an AD7794 ADC), I would like to trigger an interrupt based on the falling edge of the MISO pin. Although it is not explicitly stated that the interrupt is trigger on the MISO value, I am assuming this based on the fact that, of the four SPI signals, the MISO is the only input to the microcontroller. Please let me know if this is not correct.

1
carminterruptspilpc
What? That doesn't make any sense. If it's an SPI link, you should leave it to the microcontroller's SPI peripheral. Don't go bit-banging stuff that you have hardware support for. - unwind
If you are on a slave device, the SPI peripheral can trigger an interrupt for you when you receive something. If you are on a master device, this doesn't make any sense. - ElderBug
Sorry...I should have mentioned that the AD7794 ADC drives the MISO line high at the beginning of a conversion and brings it low when a conversion has been completed. I would like to use the falling edge of this pulse to trigger an interrupt instead of polling for this condition. - apandit

1 Answers

1
votes

See UM10360.pdf, chapter 9.5.6: "GPIO interrupt registers". You can enable rising and falling edge interrupts only on port 0 and 2 pins. The interrupt vector is the same as external interrupt 3.