Opcode Constancy rules

Question

So whenever I run a command on assembly and view it on CPU mode, I have the segment:offset and right afterwards I have the opcode that resembles the command. For instance, I run the command mov ax, 1A1Bh and it shows me this:

cs:0005 B81B1A mov ax, 1A1Bh

So my question is, why does 1A1Bh show up as 1B1A in the opcode?

And whenever I run mov ax, dx it shows me this:

cs:0095 8BC2 mov ax, dx

From what I understood the opcode for 'mov' is B, and for ax it is 8, so why does it show up as 8BC2?

Answer 1

x86 is little-endian, which means that the low byte of a multi-byte integer is stored at the lower address. Hence why the bytes of your immediate value show up in opposite order.

x86 instruction encoding is not straightforward - you can't always just pick out various nibbles and say "this must be the mov". If you really want to understand the instruction encoding you need to look at the x86 instruction set reference.

http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf

Answer 2

There are many different types of mov. Opcode bytes that can mean mov (not all of them always mean mov) are 88 through 8C, 8E, A0 through A3, B0 through BF, C6 and C7 (the last two only mean mov if the r/m field in their ModRM byte is 0).

There is also (depending on what you want to group with movs) movs to/from control and debug registers (0F 20 through 0F 23).

B81B1A is in a group of instructions that spans B8 through BF, based on the destination register (which is encoded in the opcode). That you saw an 8 was because the destination is ax, it has nothing to do with the 8 in 8B (where both the 8 and the B are truly part of the opcode and not some sneaky operand).

mov is complicated. You'll find much more consistency with for example the simple ALU instructions (add, or, adc, sbb, and, sub, xor, cmp are 0 through 7 respectively), that you can all encode with the same function that takes their index as parameter but further doesn't care which one it is (there are still several cases within that function of course). Other potentially useful groups are the "instructions without operands", "instructions with 1 operand and a fixed r field" and "instructions that only have an r, r/m-form"

Answer 3

Since the instruction set for the 8086 processor is more basic

Here is a list of mov opcodes in binary (for an 8086): Here is a table explaining MOD and R/M

SR stands for segment register, they are ES, CS, SS, DS.

The reference from datasheet

Obviously the machine code for different architectures is going to be different but I find it easier to learn something by starting with where it came from.

(For brevity, the instruction set encoding information begins on page 263)