0
votes

I'm having difficulty understanding how to translate a JAL (J-Type) instruction in MIPS. Here is the instruction set that I am working on:

0x00400018          add  $a0, $a3, $0 = 00E02020
0x0040001C          jal  L2
0x00400020  L1:     jr   $ra
0x00400024  L2:     sw   $s1, 0($s2)
0x00400028          bne  $a0, $0, ELSE
0x0040002C          j    L1
0x00400030  ELSE:   addi $a0, $a0, A2 
0x00400034          j    L2

The first line did not pose a problem, but for the second line, I am entirely unsure how to translate jal L2. Using the MIPS reference sheet, I see that to get the address, I need to perform R[31]=PC+8;PC=JumpAddr.

J-Type Instructions are opcode/6bit and address 26bit so the first 6bit are 00 0011 but I don't know how I get the remaining 26bit. Any help would be appreciated.

2
What do you mean by "get the the remaining 26bit"? What is this for (i.e. what are you developing)? A disassembler? An emulator? A MIPS core for an FPGA? What are your inputs and outputs?Michael
This is just for practicing to translate MIPS instructions into Machine Code (first binary then hex). Each MIPS instruction (for example add $a0, $a3, $0) is 32bit and so for line two, since I have the opcode and opcodes are 6bit, I don't know how to get the remaining 26bit (I don't know how to translate jal L2).Carlo
If you've read the full 32 bit instruction word then all you have to do is mask off the unwanted bits. Something like lower_26_bits = instruction_word & 0x3FFFFFF;.Michael
Please explain this step-by step, in relevance to R[31]=PC+8;PC=JumpAddr. How did you get to 0X3FFFFFF. I guess I don't know what you mean with "mask off the unwanted bits."Carlo

2 Answers

5
votes

I know this is completely irrelevant now, but for anyone that stumbles upon this question and needs help:

You would take the address of L2 --> 0x0040 0024 and shave off the first four bits, and last two. This would leave you with:

0000 0100 0000 0000 0000 0010 01 as your remaining 26 bits.

Hope I was able to help someone!

0
votes

MIPS has a couple of different control-flow instructions:
1. (conditional) branches
2. (unconditional) immediate jumps
3. (unconditional) register jumps

branch b contains a 16 bit signed integer number of instructions, relative to the next instruction, to branch to.

jump j /jump and link jal contains a 26 bit immediate, which is shifted right by two (because all MIPS (32) instructions are 4 bytes long). The upper 4 bits come from the instruction sequentially following the jump.

jump register jr /jump and link register jalr do not contain a branch target. The target is in a register, and as such is already 32 bits long.