How to write a code for bitwise operation in verilog for input in decimal format... I am just a starter on Verilog
01:begin
A.Receive(a);
B.Receive(b);
z=a&b;
Z.Send(z);
end
The above code is in SystemVerilog but it is still the same. a and b are decimal inputs. Is this the right way of writing like this..