Why is x86 movsd causing a triple fault exception?

2
votes

The following x86 instruction is causing a triple fault exception (cpu reset). Any idea why?

0042F94B  F20F100520E44300  movsd xmm0,qword [dword 0x43e420]

The following code was inserted just prior to that instruction to verify that memory at 0x43e420 is accessible (it is):

0042F945  8B0520E44300      mov eax,[dword 0x43e420]

X86 is in protected mode. GDT is setup properly, the segment registers are all 0x10 except cs which is 0x8. Both GDT entries are flat and use up the entire 32-bit memory space. Alignment Check (AC) on eflags is not set.

Memory at 0x43e420 is:

0x43e420: 00 00 00 00 00 00 00 40

Bochs emulator outputs these messages once that instruction is executed:

interrupt(): gate.type(9) != {5,6,7,14,15}    
interrupt(): gate descriptor is not valid sys seg (vector=0x0d)
interrupt(): gate descriptor is not valid sys seg (vector=0x08)

This is part of OS boot code; not an application under any operating system.

2
assemblyx86
This instruction looks funky. AFAIK, movsd is a dword-sized string move. Did you perhaps mean movq? – 500 - Internal Server Error
There are two opcode instructions with the same name. movsd used here is part of the SSE2 instruction set. – tgiphil
So there are. Well, that's not very convenient, is it? Oh well, learn something new every day. So, for the problem, could this be an alignment issue? – 500 - Internal Server Error
I don't see how. 0x43e420 is aligned up to 32 bytes. Plus the alignment check is turned off. – tgiphil
Yeah, I see now that you already checked that - sorry. – 500 - Internal Server Error

2 Answers

6
votes

Given the provided information, I suspect that the SSE instructions have not been enabled for your processor. If not enabled, their use will trigger an exception (vector 19 I think). Furthermore, if this vector is not properly initialized, then I can definitely see it leading to a triple fault.

For more information on enabling the processor SSE instructions, please refer to Volume 3, chapter 13 of the 64-ia-32-architectures software development manual.

Hope this helps.

2
votes

Given that the address is aligned and you’re in boot code, the most likely explanation for the initial exception is that SSE has not been enabled yet at that point in boot. Why that exception leads to a triple fault is a more subtle question, but probably you haven’t set up the vector to handle it.