GNU Make -- Append to a variable all targets matching a pattern

Question

Before I start, I'll mention that I'm not using GNU Make in this case for building a C/C++ project.

Makefile:

DEST_DIR = build/
SRC_DIR = src/

$(SRC_DIR)a/ : $(SOMETHING_ELSE)
    $(DO_SOMETHING_TO_GENERATE_A_DIR)

$(DEST_DIR)% : $(SRC_DIR)%
    cp -r $^ $@

ALL_DEPS += <SOMETHING>

... more code which appends to ALL_DEPS ...

.PHONY: all

all : $(ALL_DEPS)

I've got some files not generated via Make rules in $(SRC_DIR). (For the sake of this example, let's say there's a directory $(SRC_DIR)b/ and a file $(SRC_DIR)c .)

I want to append to ALL_DEPS all targets which represent files or directories in $(DEST_DIR) so that "make all" will run all of the available $(DEST_DIR)% rules.

I thought to do something like this:

ALL_DEPS += $(addprefix $(DEST_DIR),$(notdir $(wildcard $(SRC_DIR)*)))

But of course, that doesn't catch anything that hasn't yet been made. (i.e. it doesn't append $(DEST_DIR)a/ to the list because $(SRC_DIR)a/ doesn't yet exist when the $(wildcard ...) invocation is evaluated and the shell doesn't include it in the results returned by the $(wildcard ...) invocation.)

So, rather than a function which finds all (currently-existing) files matching a pattern, I need one which finds all targets matching a pattern. Then, I could do something like this:

ALL_DEPS += $(addprefix $(DEST_DIR),$(notdir $(targetwildcard $(SRC_DIR)*)))

If it matters any, I've got much of the GNU Make code split across multiple files and included by a "master" Makefile. The ALL_DEPS variable is appended to in any of these files which has something to add to it. This is in an attempt to keep the build process modular as opposed to dropping it all in one monster Makefile.

I'm definitely still learning GNU Make, so it's not unlikely that I'm missing something fairly obvious. If I'm just going about this all wrong, please let me know.

Thanks!

Something like $(patsubst $(SRC_DIR)%,$(DEST_DIR)%,$(wildcard $(SRC_DIR)*) then? — tripleee
That's a slightly simpler way to do $(addprefix $(DEST_DIR),$(notdir $(wildcard $(SRC_DIR)*))), but it doesn't solve my problem. $(wildcard $(SRC_DIR)*) doesn't catch directories in $(SRC_DIR) that don't yet exist but which are targets of existing rules and can be built. So, your suggestion still wouldn't cause make all to run cp -r src/a/ build/a/. Only cp -r src/b/ build/b/ and cp -r src/c build/c . — AntiMS

The Real Edward Cullen The Real Edward Cullen · Accepted Answer · 2014-02-02T02:52:34

It is simply not possible to do what you're trying to do; you're trying to get make to recognise something that doesn't exist.

This is part of the reason why, in general, wildcards are bad (the other being that you can end up including stuff you didn't mean to). The right thing to do here is to explicitly create a list of source files (ls -1 | sed -e 's/$.*$/sources+=\1/' > dir.mk) and perform the patsubst transformation on that list.

If you have additional files that are generate as part of the build, then you can append them to that list and their rules will be found as you'd expect.

GNU Make -- Append to a variable all targets matching a pattern

1 Answers