I need to get command line options to add conditions to constraints in SystemVerilog.
I'm invoking $value$pluargs("string=%d",val)
from a function call, and I need to use the parameter passed to the function as the 'string' name.
function(string name);
$value$plusargs("<name>=%d", val)
endfunction
I'm not sure how to do this. Saying $value$plusargs("%s=%d",name,val)
results in a 'too many arguments' error.