makefile implicit rule -- confused

Question

I am working on a project where makefile is used to make an target. Here i am confused how makefile is generating .o files from the .cpp file.

Like file clientthread_level1_unix.o have to be generated from clientthread_level1_unix.cpp file. But no where it is specified to use *.cpp file for it.

EXTRALIBS = -pthread -lz -ldl -lm
OPENGLLIBS =
LDFLAGS_GL =
LDLIBS = ${APPEXTRALIBS} ${top_builddir}/lib/libwx_based-2.6.a ${EXTRALIBS}

# Compiler used
CXX         = c++
CC          = gcc

CANALOBJS =     ../../common/listenthread_unix.o ../../common/clientthread_level1_unix.o ../../common/devicethread_unix.o \
        ../../common/canalshmem_level1_unix.o ../../common/clientlist.o ../../common/controlobject.o \
        ../../common/devicelist.o ../../common/udpreceivethread_unix.o ../../../vscp/common/vscp.o \
        ../../common/clientthread_level2_unix.o ../../common/canalshmem_level2_unix.o \
        ../../common/tcplistenthread.o
CANALHDRS = ../../common/clientlist.h ../../common/controlobject.h ../../common/devicelist.h \
        ../../common/canal.h ../../common/canaldlldef.h \
        ../../common/version.h ../../common/canal_unix_ipc.h ../../common/CanalShMem_level1_unix.h \
        ../../common/CanalShMem_level2_unix.h ../../common/clientthread_level1_unix.h ../../common/clientthread_level2_unix.h
PROJOBJS    = ../../../common/dllist.o ../../../common/configfile.o ../../../common/crc.o
PROJHDRS    = ../../../common/dllist.h ../../../common/configfile.h
OBJS        = canald.o
HDRS        = canald.h


all:        canald

# Build the Linux executable
canald:     $(OBJS) $(HDRS) $(CANALOBJS) $(CANALHDR) $(PROJOBJS) $(PROJHDRS)
        $(CXX) $(OBJS) $(CANALOBJS) $(PROJOBJS) -o canald $(LIBS) $(LDLIBS)

If we use the Implicit rule then also, then also canald target is not as per that. http://www.gnu.org/software/make/manual/make.html#make-Deduces http://www.gnu.org/software/make/manual/make.html#Implicit-Rules

Please sugest how is this line working to produce canald ?

    $(CXX) $(OBJS) $(CANALOBJS) $(PROJOBJS) -o canald $(LIBS) $(LDLIBS)

Matthias Matthias · Accepted Answer · 2013-03-25T08:35:48

The line

 $(CXX) $(OBJS) $(CANALOBJS) $(PROJOBJS) -o canald $(LIBS) $(LDLIBS)

will approximately (I skipped not defined variables) be translated into:

 c++  canald.o ../../common/listenthread_unix.o ../../common/clientthread_level1_unix.o ../../common/devicethread_unix.o \
    ../../common/canalshmem_level1_unix.o ../../common/clientlist.o ../../common/controlobject.o \
    ../../common/devicelist.o ../../common/udpreceivethread_unix.o ../../../vscp/common/vscp.o \
    ../../common/clientthread_level2_unix.o ../../common/canalshmem_level2_unix.o \
    ../../common/tcplistenthread.o \
    ../../../common/dllist.o ../../../common/configfile.o ../../../common/crc.o \
    -o canald /lib/libwx_based-2.6.a -pthread -lz -ldl -lm

i.e., a "normal" compiler call. Since there is an explicit rule for canald, there is no need to search for implicite ones. In addition, it is the target rule in the Makefile, thus it is the default target.

Howerver, for objects canald depends on, no explicit rule exist, thus the implicit rules are used.

If you want to know, which implicit rules exist, call make -p and search in the output for the pattern, e.g. in your case for %.cpp.

makefile implicit rule -- confused

1 Answers