What is the size of each asm instruction? [duplicate]

11
votes

What is the size of each asm instruction? Every instruction takes how many bytes? 8 bytes? Four for the opcode and Four for the argument? What happens when you have one opcode and 2 arguments, in mov, for example? Do they have a fixed size in memory or do they vary? Does EIP have anything to do with this, of its value is always incremented by one, being totally independent of what kind of instruction it is passing by?

I ask this as when I was reading http://en.wikibooks.org/wiki/X86_Disassembly/Functions_and_Stack_Frames , I stumbled across the fact that it seems a call instruction is equivalent to a push and jmp instruction.

call MYFUNCTION
mov my_var, eax

being the same as

push [eip + 2];
jmp MYFUNCTION;
mov my_var, eax

When we're pushing [eip + 2] on the stack, to what value are we pointing then? To the line right next to "jmp MYFUNCTION", mov my_var eax, right?

ps: MSVC++ flags an error on the first line, as it says eip is undefined. It works for eax, esp, ebp, etc. What am I doing wrong?

2
assemblyx86
This question has nothing to do with c++, so tag removed. – Kirill V. Lyadvinsky
It should be push eip + 2, not push [eip + 2]. – Daniel Brückner
It must be "push eip + 2", but this is not valid - call is theoretically equivalent to this, but you cannot do this simple transformation. – Daniel Brückner
You can (see coding.derkeiler.com/Archive/Assembler/comp.lang.asm.x86/… for examples) but I don't know the reason for the design decision to have no mov EAX, EIP instruction or something similar. – Daniel Brückner
When you define instructions that read IP, you then have to define exactly what the IP's value will be when every one of those instructions is executed (the first opcode byte? the first byte of next instruction? Something in between, in a more complex instruction?) and then be prepared to live with that definition forever, for future compatibilty. Bear in mind that the actual IP isn't well defined in this respect, due to pipelining. For this reason, wise architects eschew such capabilities in the instruction set, except for specific purposes (e.g. call, and PC-relative addressing). – greggo

2 Answers

18
votes

The size of a machine instruction depends on the processor architecture - there are architectures with fixed size instruction, but you are obviously refering to the IA-32 and Intel 64 and they have strongly varing instruction lengths. The instruction pointer is of course always incremented by the length of the processed instruction.

You can download the IA-32 and Intel 64 manuals from Intel - they contain almost everything you can know about the architecture. You can find an opcode map and instruction set format in Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2B: Instruction Set Reference, N-Z on pages 623 to 768.

2
votes

Machine code size depends on the processor's architecture.

For example, on IA-32, the instruction size varies from 1 to 6 bytes (or more).