0
votes

I asked this question in another post but was probably too vague, so I'm trying again.

I have a Linux GNU C project that requires building output for two different hardware devices, using a common C source code base, but different makefiles. There is plenty of disk space, so I don't mind having two copies of the same source files in two different directories. The targets use different processors, so the generated obj and exe files are completely different, even though the compiled code is nearly the same (different preprocessor directives, etc.).

I am testing a small makefile to do this. It needs to handle .c & .h files but only does .c for now. The source directory is "/mnt/hgfs/works/firmware_us10c" and I'm copying into a sibling directory "/mnt/hgfs/works/firmware_us100c". This is what it looks like:

%.c : ../firmware_us10c/%.c
<tab>cp $< $@

When I test this file with "make -f test -n" it responds:

make: *** No targets. Stop.

I verified with "stat" that main.c and many others in the source folder are newer, so there should be plenty of targets. Can someone help me fix this simple makefile? How would I change it to handle .h files too? Thanks in advance - Greg

Edit: Thanks @PW for your input. I now have this:

DEST = $(addprefix ../firmware_us100c/, $(wildcard *.c))
all: $(DEST)
../firmware_us100c/%.c: %.c
    cp $< $@

How do I extend this to cover the .h files too?

Edit: I played around with it and came up with this to handle the .h files, as well as three subdirectories that need to be updated also.

DEST = $(addprefix ../firmware_us100c/, $(wildcard *.c))
DEST += $(addprefix ../firmware_us100c/, $(wildcard *.h))
DEST += $(addprefix ../firmware_us100c/, $(wildcard zem510/*.c))
DEST += $(addprefix ../firmware_us100c/, $(wildcard zem510/*.h))
DEST += $(addprefix ../firmware_us100c/, $(wildcard fpsensor/*.c))
DEST += $(addprefix ../firmware_us100c/, $(wildcard fpsensor/*.h))
DEST += $(addprefix ../firmware_us100c/, $(wildcard iclock/*.c))
DEST += $(addprefix ../firmware_us100c/, $(wildcard iclock/*.h))

all: $(DEST)

../firmware_us100c/%.c: %.c
    cp $< $@
../firmware_us100c/%.h: %.h
    cp $< $@
../firmware_us100c/zem510/%.c: zem510/%.c
    cp $< $@
../firmware_us100c/zem510/%.h: zem510/%.h
    cp $< $@
../firmware_us100c/fpsensor/%.c: fpsensor/%.c
    cp $< $@
../firmware_us100c/fpsensor/%.h: fpsensor/%.h
    cp $< $@
../firmware_us100c/iclock/%.c: iclock/%.c
    cp $< $@
../firmware_us100c/iclock/%.h: iclock/%.h
    cp $< $@

If there's a cleaner way, please let me know.

Edit: Thanks @PW for the additional edits to clean it up. There is one more thing that would be helpful. Is there a way to reverse the logic so it will run in the destination (target) directory? As it is I have to switch back & forth between directories after edits, to update the source, then run the makefile. I tried a few things but couldn't figure it out.

1
Is that all you have in your makefile?bmargulies
Yes, the project builder is in a separate makefile. If I can figure out how, I will merge this in so it updates the source files, then builds the project.pwrgreg007
I'm not sure what that means. I can't merge anything until this part is working. That's what I'm asking about here.pwrgreg007

1 Answers

1
votes

you have rule in your makefile but no target.

CP = cp
# CP = cp -p # if you want to preserve dates
DEST = $(addprefix your_dest_folder/, $(wildcard *.c *.h))

all: $(DEST)

your_dest_folder/%.c: %.c
    $(CP) $< $@

your_dest_folder/%.h: %.h
    $(CP) $< $@

.PHONY: all

since you have subdirs, change the wildcard to $(wildcard */*.c */*.h)