4
votes

I'm trying to cross=compile a simple program with inline assembly for a variety of ARM processors. It contains the assembly instruction QSUB which according to this document is both a valid ARM and Thumb-2 instruction.

This compiles fine for me when building for a cortex-a8.

I get the compile error in the title when I try building for a cortex-m3 and can't figure out why. I attempted to force thumb mode with the compiler switch -mthumb, and then the error changes to "selected processor does not support thumb mode." I'm a bit confused because cortex-m3 does in fact support thumb mode.

Here's the compile options I'm using with codesourcery's gcc:

arm-none-linux-gnueabi-gcc helloworld.c -o a.out -lm -mthumb -mcpu=cortex-m3
2
Just something to try, sometimes gcc can be picky about option order, try setting the CPU type before setting thumb mode. (-mcpu=cortex-m3 -mthumb) Possibly move both before even helloworld.c - Joachim Isaksson
thumb (not thumb2) is the most portable across the arm family. I cant find a concrete list from arm but it appears that the cortex-m4 is an ARMv7E-M and the cortex-m3 is an ARMv7-M. looking at a current ARMv7-M ARM, it shows the QSUB being ARMv7E-M specific not all ARMv7 cores. (older armv7-m arm's did show QSUB as simply an ARMv7-M instruction, very confusing). Note the Cortex-m0 and -m1 are armv6 based and have a very limited thumb2 instruction set... - old_timer

2 Answers

4
votes

QSUB is not mentioned in ARM's "Cortex-M3 Devices Generic User Guide" (Document DUI0552A).

Additionally, TI's "Cortex-M3/M4F Instruction Set, TECHNICAL USER'S MANUAL" indicates that QSUB is not supported on the Cortex-M3.

I think you're just going to have to believe what GCC is telling you...

4
votes

In accordance with TI the best gcc flags for cortex-a8 are

-march=armv7-a -mtune=cortex-a8 -mfpu=neon -ftree-vectorize -ffast-math -mfloat-abi=softfp

http://processors.wiki.ti.com/index.php/Cortex-A8