Virtual memory address translation

Question

I was reading about how Virtual Memory and Memory management works in an Operating System. I understood how each process has its own contiguous logical address space. This address space need not be contiguous in physical memory. For this purpose, paging is used. The page tables are used to do the mapping from logical address to a physical address. The logical address is divided in two parts, first part gives the logical page number, which using the page table is translated to the physical page number, and the second part is offset into that page. Thus the contents from memory are retrieved.
Virtual memory is an extension of this, where all the pages need not be in main memory, and can be brought there through page faults.

Using my understanding I solved the 4th question on this page: www.ics.uci.edu/~bic/courses/JaverOS/ch8-ex.pdf

I got my answers wrong, and I have no clue what the right answers are. This is the way I did it:

From the diagram in the question, Page table for Process P1 will look like this according to me:
0-4
1-5
2-6
3-7

So when process P1 makes a reference to 0 i.e is 0000 in 4 bit binary, we divide 
it as 00|00. 
Thus logical page no = 00 and offset = 00.
From the page table, we can see 0 is mapped to 4th physical frame. 
Offset is also 00 here. So I get the 0th entry(offset) in the 4th frame. 
The content at this memory location(i.e Frame No. 4, offset 0) is 0.

Why is this wrong? Can anyone help?

Answer 1

I'll start with virtual address 8, it should illustrate things better.

8 = 2×4 + 0. The physical address is stored at offset 0 of page 2 of the process. We look up the second page. For P1, page 2's address is stored at PA 4 + 2, and it is 28. We look up the contents of PA 28, and get value 0. For P2, page 2's address is stored at PA 12 + 2, it is 24, the contents of PA 24 are 5.

Now with virtual address 15, which illustrates the exceptional cases.

15 = 3×4 + 3. The physical address is stored at offset 3 of the process's page 3. For P1, page 3's address is stored at PA 4 + 3, which contains -2. The sign bit indicates the page is outside physical memory, which means there will be a hard page fault (a situation the OS handles exceptionally, but not an error). For P2, page 3's address is stored at PA 12 + 3, which some special mechanism (a poison value, an external frame table?) tells us is invalid. This is an error, and gets reported as a segmentation fault.

One last example with VA 7 and P1 to explain offsets:

7 = 1×4 + 3. The physical address is stored at offset 3 of P1's page 1. Page 1 is at PA 8, offset 3 of page 1 is at PA 8+3.

Answer 2

I'm assuming the diagram shows the physical memory and physical addresses on the left. It wouldn't make sense to let p1 and p2 directly access their own and each other's page tables.

Given that, for virtual address 0 you fetch -45 from page frame 1 for p1 and 0 from page frame 3 for p2.

For VA = 1 you fetch 8 and -12 respectively.

For VA = 4 you fetch nothing because that's outside of the defined page tables for p1 and p2 (that is how I interpret "The size of each page and page table is 4" and "The page table of p1 begins at address 4; the page table of p2 begins at address 12."; if my interpretation is wrong, then the problem statement is incorrect as well). Ditto for the rest of the VAs because they're greater than or equal to 4 and fall outside the defined page tables too.

You can then work out the final answers from here.